TLM Generation with ESE

Without a well-structured system design methodology, it is no more doable to cope with the dramatically increasing complexity in modern embedded system designs. Platform methodology, which often goes with hardware/software co-design with virtual prototyping, is the most popular solution [3]. Although it has been helpful for reduction of engineering costs and the length of design cycle due to the use of verified platform and virtual prototyping, it still has drawbacks that must be overcome. The drawbacks mainly result from the followings; The starting point of a design is not behavioral specification of the system but a relatively inflexible platform instance. The refinement steps and models are not clearly defined and synthesis is not taken into consideration. ESE(Embedded System Environment) overcomes these drawbacks while keeping the advantage of the current Platform methodology. A design starts with specification, which is flexible in nature and simplifying system level complexity by hiding unnecessary details. Refinement steps and models are firmly defined so that a design can be automatically synthesized. In the result, the productivity gain that designers can obtain with ESE is proved to be greater than 1000.